Address Map; 32-Bit Serial Flash Addresses - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
17.5.2

Address Map

In external address space read mode, the serial flash connected is assigned in the SPI multi I/O bus space. A maximum
accessible address space differs depending on the number of serial flash memories connected. In combination with
DREAR, a maximum of 4 Gbytes can be accessed when one serial flash memory is connected, and a maximum of 8
Gbytes can be accessed when two memories are connected.
Table 17.4 Address Map
Channel
0
17.5.3

32-bit Serial Flash Addresses

Since the SPI multi I/O bus space is 64 Mbytes, only a part of the 32-bit serial flash address area can be directly accessed.
Here, the fixed value set in the pertinent register is used as the upper bit value of a 32-bit address.
To output serial flash addresses in 32 bits, set the ADE[3] bit in DRENR to 1, set the range of the external addresses used
as the serial flash addresses to the EAC[2:0] bits in DREAR, and set the upper bit value of the 32-bit address as the fixed
value to the EAV[7:0] bits in DREAR.
When EAC[2:0] = 000
Serial flash address
When EAC[2:0] = 001
Serial flash address
Figure 17.4 32-Bit Address Setting
Setting the ADE[3] bit in DRENR to 1 allows the serial flash address to be output using [31:0] bits. When EAC[2:0] =
000, external address bits [24:0] are valid; set the value for [32:25] bits to EAV[7:0]. When EAC[2:0] = 001, external
address bits [25:0] are valid; set the value for [32:26] bits to EAV[7:1].
The address bits actually used for access depend on the number of serial flash memories connected. When one serial
flash memory is connected, address bits [31:0] are used and when two memories are connected, address bits [32:1] are
used.
Note: When the capacity of the serial flash memory used is smaller than 4 Gbytes, keep the following point in mind.
If an access spreads over the last address of the serial flash in burst mode (RBE bit in DRCR = 1), the access
address does not agree with the internal address of the serial flash. To prevent this, software should appropriately
manage the accessible address areas for the serial flash memory used according to the memory capacity.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Number of Serial Flash Memories
Connected
1
2
EAV [7:0] bits
7 0
32 25 24
EAV [7:0] bits
7 0
32 26 25
Internal Address
H'18000000 to H'1BFFFFFF
H'58000000 to H'5BFFFFFF
(mirror area)
H'18000000 to H'1BFFFFFF
H'58000000 to H'5BFFFFFF
(mirror area)
External address bits [24:0]
External address bits [25:0]
17. SPI Multi I/O Bus Controller
Max. Access Area
4 Gbytes
8 Gbytes
0
0
17-32