RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
3.3
Hardware Used in Each Boot Mode
Table 3.2 gives information about the hardware used in each boot mode.
Table 3.2
Hardware Used in Each Boot Mode
Boot Mode
Boot Mode 0
(CS0-space 16-bit booting)
Boot Mode 1
(Serial flash booting)
Boot Mode 2
(eSD booting)
Boot Mode 3
(eMMC booting)
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Peripheral Module
Bus state controller
SPI multi I/O bus controller
SD host interface
MMC host interface
Pins Used
Remarks
A[20:1]
D[15:0]
CS0
RD
CKIO
SPBCLK_0
The internal baud rate generator generates
SPBSSL_0
SPBCLK_0 by dividing Bφ by 8.
SPBMO0_0
SPBMI0_0
SD_CLK_0
The SD clock frequency (SD_CLK_0) is
SD_CMD_0
generated by dividing P1φ by 4.
SD_D[3:0]_0
MMC_CLK
The MMC clock frequency (MMC_CLK) is
MMC_CMD
generated by diving P1φ by 4.
MMC_D[3:0]
3. Boot Mode
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3-2