Usage Note; Timing To Clear Interrupt Source; Notes On Selecting Irq Interrupt Pin Functions; Notes On Reading Interrupt Id Values From Interrupt Acknowledge Register (Icciar) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
7.8

Usage Note

7.8.1

Timing to Clear Interrupt Source

Clear the interrupt source flag to 0 in the interrupt exception handler. It takes some time to clear an interrupt in the CPU
after clearing the interrupt source flag to 0. Read the interrupt source flag after clearing it to ensure that the interrupt
request that should have been cleared is not received again erroneously. After that, execute the return instruction.
7.8.2

Notes on Selecting IRQ Interrupt Pin Functions

While the corresponding setting in interrupt control register 1 (ICR1) is for interrupt requests to be detected on falling
edges or both edges of an IRQn input and the current input on the pin is at the low level, this will be detected as a falling
edge and thus an interrupt when the pin function is switched to the IRQ interrupt function.
7.8.3 Notes on Reading Interrupt ID Values from Interrupt Acknowledge Register
(ICCIAR)
If an interrupt ID value read from the interrupt acknowledge register (ICCIAR) is 0, the interrupt notice may be wrong.
At that time, confirm the interrupt state before proceeding with interrupt processing.
When the interrupt ID is read as 0, the interrupt state can be confirmed by using bit 0 in the active bit register 0
(ICDABR0).
If the interrupt state is inactive, the interrupt notice is wrong and no interrupt processing is required.
Return from interrupt processing after writing the same value as the setting value to the interrupt priority register 0
(ICDIPR0).
If the interrupt state is active, the interrupt notice is correct. Proceed with interrupt processing.
If an interrupt ID value read from the interrupt acknowledge register (ICCIAR) is 1022 or 1023, return from interrupt
processing after writing the same value as the setting value to the interrupt priority register 0 (ICDIPR0).
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
7. Interrupt Controller
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