Riicndrs - I²C Bus Shift Register - Renesas RZ/A Series User Manual

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RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
18.3.16
RIICnDRS — I²C Bus Shift Register
Initial Value:
Bit
31
30
29
Initial value
0
0
0
R/W
Bit
15
14
13
0
0
0
Initial value
R/W
RIICnDRS is an 8-bit shift register to transmit and receive data.
During transmission, transmit data is transferred from RIICnDRT to RIICnDRS and is sent from the
SDA pin. During reception, data is transferred from RIICnDRS to RIICnDRR after 1 byte of data has
been received.
RIICnDRS cannot be accessed directly.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Access:
This register is not accessible.
Address:
0000 00FF
H
28
27
26
0
0
0
12
11
10
0
0
0
25
24
23
22
0
0
0
0
9
8
7
6
0
0
1
1
18. I²C Bus Interface
21
20
19
18
0
0
0
0
5
4
3
2
DRS[7:0]
1
1
1
1
17
16
0
0
1
0
1
1
18-43

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Rz/a1 seriesRz/a1lu seriesRz/a1lc series

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