Rscan0Thlpctrm - Transmit History Pointer Control Register (M = 0 Or 1) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
21.3.60 RSCAN0THLPCTRm — Transmit History Pointer Control Register (m = 0 or 1)
Access: Can be written in 8-, 16-, and 32-bit units
Address: <RSCAN0_base> + 0440
Initial value: 0000 0000
H
Bit 31 30 29
— — —
Initial value 0 0 0
R/W R R R
Bit 15 14 13
— — —
0 0 0
Initial value
R/W R R R
Table 21.79
Bit Position
31 to 8
7 to 0
THLPC[7:0] Bits
When the THLPC[7:0] bits are set to FF
history buffer. At this time, the THLMC[4:0] (transmit history buffer unread data counter) value in the
RSCAN0THLSTSm register is decremented. Write FF
RSCAN0THLACCm register.
Write FF
buffer is used) and the THLEMP flag in the RSCAN0THLSTSm register is 0.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
+ (m * 0004 )
H H
28 27 26 25
— — — —
0 0 0
R R R R
12 11 10
— — — —
0 0 0
R R R R
RSCAN0THLPCTRm register contents
Bit Name Function
Reserved The write value should always be 0.
THLPC[7:0] Transmit History List Pointer Control
Writing FF
transmit history buffer.
Set Value: FF
only when the THLE bit in the RSCAN0THLCCm register is set to 1 (transmit history
H
24 23 22
— — —
0 0 0 0
R R R
9 8 7 6
—
0 0 0 0
R W W
to these bits moves the read pointer to the next unread data in the
H
H
, the read pointer moves to the next data in the transmit
H
to the THLPC[7:0] bits after reading from the
H
21. CAN Interface
21 20 19 18
— — — —
0 0 0 0
R R R R
5 4 3 2
THLPC[7:0]
0 0 0 0
W W W W
17 16
— —
0 0
R R
1 0
0 0
W W
21-110