Device-Id Address Detection - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
18.9.3

Device-ID Address Detection

The RIIC module has a facility for detecting device-ID addresses conformant with the I
specification (Rev. 03). When the RIIC receives 1111 100
restart condition was issued with the RIICnSER.DIDE bit set to 1, the RIIC recognizes the address as a
device ID, sets the RIICnSR1.DID flag to 1 on the rising edge of the ninth SCL clock cycle when the
following R/W# bit is 0, and then compares the second and subsequent bytes with its own slave
address. If the address matches the value in the slave address register, the RIIC sets the corresponding
RIICnSR1.AASy flag (y = 0 to 2) to 1.
After that, when the first byte received after a start or restart condition is issued matches the device ID
address (1111 100
subsequent bytes and sets the RIICnSR2.TDRE flag to 1.
In the device-ID address detection function, the RIIC clears the DID flag to 0 if a match with the
RIIC's own slave address is not obtained or a match with the device ID address is not obtained after a
match with the RIIC's own slave address and the detection of a restart condition. If the first byte after
detection of a start or restart condition matches the device ID address (1111 100
0, the RIIC sets the DID flag to 1 and compares the second and subsequent bytes with the RIIC's slave
address. If the R/W# bit is 1, the DID flag holds the previous value and the RIIC does not compare the
second and subsequent bytes. Therefore, the reception of a device-ID address can be checked by
reading the DID flag after confirming that TDRE = 1.
Furthermore, prepare the device-ID fields (three bytes: 12 bits indicating the manufacturer + 9 bits
identifying the part + 3 bits indicating the revision) that must be sent to the host after reception of a
continuous device-ID field as normal data for transmission. For details, see I
NXP Semiconductors.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
) again and the following R/W# bit is 1, the RIIC does not compare the second and
B
18. I²C Bus Interface
as the first byte after a start condition or
B
) and the R/W# bit is
B
2
C Bus Standard from
2
C bus
18-70