Fifo Status Register (Ssifsr) - Renesas RZ/A Series User Manual

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RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
19.3.6

FIFO Status Register (SSIFSR)

SSIFSR contains status flags that indicate the state of operation of the transmit and receive FIFO data registers.
Bit:
31
-
Initial value:
0
R/W:
R
Bit:
15
-
Initial value:
0
R/W:
R
Bit
Bit Name
31 to 28
27 to 24
TDC[3:0]
23 to 17
16
TDE
15 to 12
11 to 8
RDC[3:0]
7 to 1
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
30
29
28
27
26
-
-
-
TDC[3:0]
0
0
0
0
0
R
R
R
R
R
14
13
12
11
10
-
-
-
RDC[3:0]
0
0
0
0
0
R
R
R
R
R
Initial
Value
R/W
All 0
R
0000
R
All 0
R
1
R/(W)*
All 0
R
0000
R
All 0
R
25
24
23
22
21
-
-
0
0
0
0
R
R
R
R
R
9
8
7
6
-
-
0
0
0
0
R
R
R
R
R
Description
Reserved
These bits are always read as 0. The write value should always be 0.
Number of Data Bytes Stored in SSIFTDR
TDC[3:0] = H'0 indicates no data for transmission.
TDC[3:0] = H'8 indicates that 32 bytes of data for transmission is stored in
SSIFTDR.
Reserved
These bits are always read as 0. The write value should always be 0.
Transmit Data Empty
Indicates that, when the FIFO is operating for transmission, the data for
transmission in the transmit FIFO data register (SSIFTDR) is transferred to
the transmit data register (SSITDR), the number of data bytes in SSIFTDR
has become less than the transmit trigger number specified by TTRG[1:0] in
the FIFO control register (SSIFCR), and thus writing of transmit data to
SSIFTDR has been enabled.
0: Number of data bytes for transmission in SSIFTDR is greater than the set
transmit trigger number.
[Clearing conditions]
• 0 is written to TDE after data of the number of bytes larger than the set
transmit trigger number is written to SSIFTDR.
• The direct memory access controller is activated by transmit data empty
(TXI) interrupt, and data of the number of bytes larger than the set transmit
trigger number is written to SSIFTDR.
1: Number of data bytes for transmission in SSIFTDR is equal to or less than
the set transmit trigger number.*
[Setting conditions]
• Power-on reset
• Number of transmission data bytes stored in SSIFTDR has become equal
to or less than the set transmit trigger number.
Note: *1 Since SSIFTDR is an 8-stage FIFO register, the amount of data
that can be written to it while TDE = 1 is "8 – transmit trigger
number to be specified" bytes at maximum. Writing more data will
be ignored. The number of data bytes in SSIFTDR is indicated in
the TDC bits in SSIFSR.
Reserved
These bits are always read as 0. The write value should always be 0.
Number of Data Bytes Stored in SSIFRDR
RDC[3:0] = H'0 indicates no received data.
RDC[3:0] = H'8 indicates that 32 bytes of received data is stored in
SSIFRDR.
Reserved
These bits are always read as 0. The write value should always be 0.
19. Serial Sound Interface
20
19
18
17
-
-
-
-
-
0
0
0
0
0
R
R
R
R
5
4
3
2
1
-
-
-
-
-
0
0
0
0
0
R
R
R
R
1
16
TDE
1
R/(W)*
0
RDF
0
R/(W)*
19-15

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