Data Bus Width And Related Pin Setting For Each Area Depending On Boot Mode - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
8.3.2 Data Bus Width and Related Pin Setting for Each Area Depending on Boot
Mode
The initial state of data bus width and settings of the pins related to this module depends on boot mode. For boot mode,
refer to section 3, Boot Mode.
In boot mode 0, the state of area 0 is fixed to the state with bus width of 16 bits, because this LSI is started up by the
program stored in the ROM connected to area 0. The initial states of areas 1 to 5 are the same as that of area 0, but the bus
width can be changed by the program. Immediately after a power-on reset in these modes, some of the address and data-
bus signals and the CS0, RD, and RD/WR signals are automatically selected by default as the functions of the
corresponding pins, since these signals are required to read ROM data from area 0. With the exception of these pins, the
general purpose pin function is selected by default, and other required pin functions must be specified by the program.
Read access to area 0 is only permitted before the pin settings are completed.
In boot modes 1 to 3, the state of areas 0 to 5 can be changed from the initial state by the program, because the LSI is
started by the program stored in the SPI serial memory, the NAND flash memory with the SD controller, or the NAND
flash memory with the MMC controller. Since pin functions related to this module are not set automatically, they need to
be set by the program. Do not access external address spaces before the pin settings are completed.
Table 8.3 shows the initial state by areas 0 to 5 in boot modes 0 and 1 to 3.
The sample access waveforms shown in this section include the pins such as BS and WEn. They are the waveforms when
pin functions are assigned to the general I/O ports. For example, when 16-bit bus width is used, setting for pin A1 is
needed. When 8-bit bus width is used, setting for pins A1 and A0 is also needed.
For details on pin function settings, see section 41, Ports.
Table 8.3 Initial States by Areas in Boot Modes 0 and 1 to 3
Boot Mode Item
0 Data bus width
Settings of pins related
to this module
1 to 3 Data bus width
Settings of pins related
to this module
Note 1. If operation is to start in boot mode 0 and the connected boot ROM includes address bit A21 or higher-order address bits, the
circuit board must include pull-down resistors for the corresponding address lines.
Note 2. The data-bus width may be limited by the type of memory in use. For details, see section 8.4.2, CSn Space Bus Control Register
(CSnBCR) (n = 0 to 5).
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Area 0
Fixed to 16 bits.
Not changeable.
Pins A20 to A1, D15 to D0, CS0, RD/WR, and RD are set automatically. Other pins need
to be set by program.
32 bits. Can be changed by program.
General I/O function.
For external bus access, all the necessary pins need to be set by program.
8. Bus State Controller
Areas 1 to 5
16 bits. Can be changed by program.
8-5