Riic Reset And Internal Reset - Renesas RZ/A Series User Manual

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RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
18.13.3

RIIC Reset and Internal Reset

The RIIC module incorporates a function for resetting itself. There are two types of reset. One is
referred to as an RIIC reset; this initializes all registers including the RIICnCR2.BBSY flag. The other
is referred to as an internal reset; this releases the RIIC from the slave-address matched state and
initializes the internal counter while retaining other settings.
After issuing a reset, be sure to clear the RIICnCR1.IICRST bit to 0.
Both types of reset are effective for release from bus-hung states since both restore the output state of
the SCL and SDA pins to the high impedance state.
Issuing a reset during slave operation may lead to a loss of synchronization between the master device
clock and the slave device clock, so avoided this where possible. Note that monitoring of the bus state,
such as for the presence of a start condition, is not possible during an RIIC reset (RIICnCR1.ICE and
IICRST bits = 01
For a detailed description of the RIIC and internal resets, see Section 18.15, Reset Function of
RIIC.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
).
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18. I²C Bus Interface
18-87

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