RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
11.3.2
Count Clock
The count clock of OSTMn is P0φ.
11.3.3
Generation of Interrupt Request
An OSTMnTINT interrupt request is generated whenever the counter reaches 0000 0000
timer mode) or matches the comparison value (in free-running comparison mode).
An interrupt request can also be generated on starting and restarting of the counter. This is controlled
by the OSTMnCTL.OSTMnMD0 bit.
This operation is shown in the following figure.
OSTMnTS
OSTMnTT
OSTMnTE
OSTMnCMP
OSTMnCNT
OSTMnMD0 = 1 (Enabling an interrupt at the start of counting)
OSTMTINT
OSTMnMD0 = 0 (Disabling an interrupt at the start of counting)
OSTMTINT
Figure 11.2
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
A
FFFF FFFF
H
A
0000 0000
H
A + 1
Generating an Interrupt when Counting Starts (in Interval Timer Mode)
Counter operating
A
B
B
A + 1
B + 1
B + 1
11. OS Timer
(in interval
H
Counter operating
B
B
B
B + 1
B
11-8