Timeout Status Register (Tostr) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
8.4.9

Timeout Status Register (TOSTR)

TOSTOR is an 8-bit register that holds the timeout status flags for the CS spaces. When the WM bit in the CSn space
wait control register (CSnWCR) is 0 and the corresponding bit in the timeout enable register (TOENR) is 1 and the
number of cycles of waiting in response to the signal on the eternal wait input matches the setting of TOSCORn, the
timeout status flag for the corresponding space is set and a timeout detection interrupt request is generated. The only
writable value for the timeout status flags is 0, which clears the flag. Writing 1 to a flag is ignored.
Bit: 31
-
Initial value:
0
R/W: R
Bit: 15
-
Initial value: 0
R/W: R
Bit Bit Name
31 to 6 ―
5 CS5TOSTF
4 CS4TOSTF
3 CS3TOSTF
2 CS2TOSTF
1 CS1TOSTF
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
30 29 28 27 26
- - - - -
0 0 0 0 0
R R R R R
14 13 12 11 10
- - - - -
0 0 0 0 0
R R R R R
Initial
Value R/W
All 0 R
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
25 24 23 22 21
- - - - -
0 0 0 0 0
R R R R R
9 8 7 6 5
CS5T
- - - -
OSTF
0 0 0 0 0
R R R R R/W
Description
Reserved
These bits are always read as 0.
CS5 Space Timeout Status Flag
Status flag that indicates that the number of cycles of waiting due to the
input on the external wait pin during access to the CS5 space has
matched the setting of the CS5 space timeout cycle constant register
(TOSCOR5).This bit is set or cleared in the following conditions.
0: Clearing condition
When 0 is written in CS5TOSTF.
1: Setting condition
When the WM bit in the CS5 space wait control register (CS5WCR) is 0
and the CS5TOEN bit in the timeout enable register (TOENR) is 1, the
number of cycles of waiting due to the input on the external wait pin
during access to the CS5 space has matched the setting of TOSCOR5.
CS4 Space Timeout Status Flag
Status flag that indicates that the number of cycles of waiting due to the
input on the external wait pin during access to the CS4 space has
matched the setting of the CS4 space timeout cycle constant register
(TOSCOR4). For the condition to set or clear this bit, refer to the
description of CS5TOSTF.
CS3 Space Timeout Status Flag
Status flag that indicates that the number of cycles of waiting due to the
input on the external wait pin during access to the CS3 space has
matched the setting of the CS3 space timeout cycle constant register
(TOSCOR3). For the condition to set or clear this bit, refer to the
description of CS5TOSTF.
CS2 Space Timeout Status Flag
Status flag that indicates that the number of cycles of waiting due to the
input on the external wait pin during access to the CS2 space has
matched the setting of the CS2 space timeout cycle constant register
(TOSCOR2). For the condition to set or clear this bit, refer to the
description of CS5TOSTF.
CS1 Space Timeout Status Flag
Status flag that indicates that the number of cycles of waiting due to the
input on the external wait pin during access to the CS1 space has
matched the setting of the CS1 space timeout cycle constant register
(TOSCOR1). For the condition to set or clear this bit, refer to the
description of CS5TOSTF.
8. Bus State Controller
20 19 18 17 16
- - - - -
0 0 0 0 0
R R R R R
4 3 2 1 0
CS4T CS3T CS2T CS1T CS0T
OSTF OSTF OSTF OSTF OSTF
0 0 0 0 0
R/W R/W R/W R/W R/W
8-32