Caution On Period Setting; Contention Between Tcnt Write And Clear Operations - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
10.7.3

Caution on Period Setting

When counter clearing on compare match is set, TCNT is cleared in the final state in which it matches the TGR value
(the point at which the count value matched by TCNT is updated). Consequently, the actual counter frequency is given
by the following formula:
P0φ
f =
(N+1)
Where f: Counter frequency
P0φ: Peripheral clock operating frequency
N: TGR set value
10.7.4

Contention between TCNT Write and Clear Operations

If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes precedence and the
TCNT write is not performed.
Figure 10.99 shows the timing in this case.
Figure 10.99 Contention between TCNT Write and Clear Operations
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
P0φ
Address
Write signal
Counter clear
signal
TCNT
10. Multi-Function Timer Pulse Unit 2
TCNT write cycle
T1 T2
TCNT address
N H'0000
10-142