Input/Output Pins - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
Figure 7.1 shows a block diagram.
Direct memory access controller
JPEG code unit (RZ/A1LU only)
Multi-function timer pulse unit 2
Serial communication interface with FIFO
Renesas serial peripheral interface
IEBus
CD-ROM decoder (RZ/A1L only)
Figure 7.1 Block Diagram
7.2

Input/Output Pins

Table 7.1 shows the pin configuration.
Table 7.1 Pin Configuration
Pin Name
Nonmaskable interrupt input pin
Interrupt request input pins
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Peripheral bus
NMI
IRQ7 to IRQ0
(Interrupt request)
(Interrupt request)
USB 2.0 host/function module
(Interrupt request)
Video display controller 5
(Interrupt request)
(Interrupt request)
OS timer
(Interrupt request)
Bus state controller
(Interrupt request)
Watchdog timer
(Interrupt request)
(Interrupt request)
12-bit A/D converter
(Interrupt request)
Serial sound interface
(Interrupt request)
Renesas SPDIF interface
(Interrupt request)
I 2 C bus interface
(Interrupt request)
(Interrupt request)
CAN interface
(Interrupt request)
(Interrupt request)
TM
controller (RZ/A1L only)
(Interrupt request)
(Interrupt request)
MMC host interface
(Interrupt request)
SD host interface
(Interrupt request)
Realtime clock
(Interrupt request)
SCUX
(Interrupt request)
Media local bus (RZ/A1L only)
(Interrupt request)
LIN interface (RZ/A1L only)
(Interrupt request)
Serial communication interface
(Interrupt request)
EthernetAVB (RZ/A1LU only)
(Interrupt request)
Ethernet controller
(Interrupt request)
Capture engine unit
(Interrupt request)
On-chip RAM
(Interrupt request)
Internal bus
Pin interrupts
TINT121 to TINT0
Symbol
NMI
IRQ7 to IRQ0
TINT121 to TINT0
AXI bus
Input GIC
control
Priority
identifier
INTC
I/O Function
Input Input of nonmaskable interrupt request signal
Input Input of maskable interrupt request signals
Input Input of maskable interrupt request signals
7. Interrupt Controller
Interrupt request
CPU
7-2