Clock Signals; Clock Signals For The System And Realtime Clock - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
6.10

Clock Signals

6.10.1

Clock Signals for the System and Realtime Clock

Clock pulse generator
10.00 to
13.33 MHz
Crystal
XTAL
oscillator
EXTAL
Crystal
USB_X2
oscillator
USB_X1
48 MHz
32.768 KHz
Crystal
RTC_X2
oscillator
RTC_X1
Figure 6.5 Clock Signals for the System and Realtime Clock
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Divider 1 Divider 2
u 1
u 1
PLL circuit
u 2/3
(u 30, 32)
u 1/4
u 1/3
SSCG
circuit
u 1/6
u 1/12
u 1/6
u 1/12
Realtime clock
Divider
CPU clock
(II max. 400.00 MHz)
Internal bus clock
(BI max. 133.33 MHz)
Peripheral clock 1
(P1I max. 66.67 MHz)
External bus clock
(CKIO max. 66.67 MHz)
Peripheral clock 0
(P0I max. 33.33 MHz)
Peripheral clock 1C
(P1I max. 66.67 MHz)
Peripheral clock 0C
(P0I max. 33.33 MHz)
Peripheral clocks 0C and 1C:
These clock signals are not frequency-modulated even
if the SSCG function is enabled.
128 Hz
6. Clock Pulse Generator
6-15