Pwm Modes - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
10.4.5

PWM Modes

In PWM mode, PWM waveforms are output from the output pins. The output level can be selected as 0, 1, or toggle
output in response to a compare match of each TGR.
TGR registers settings can be used to output a PWM waveform in the range of 0% to 100% duty.
Designating TGR compare match as the counter clearing source enables the period to be set in that register. All channels
can be designated for PWM mode independently. Synchronous operation is also possible.
There are two PWM modes, as described below.
• PWM mode 1
PWM output is generated from the TIOCA and TIOCC pins by pairing TGRA with TGRB and TGRC with TGRD.
The output specified by bits IOA0 to IOA3 and IOC0 to IOC3 in TIOR is output from the TIOCA and TIOCC pins
at compare matches A and C, and the output specified by bits IOB0 to IOB3 and IOD0 to IOD3 in TIOR is output at
compare matches B and D. The initial output value is the value set in TGRA or TGRC. If the set values of paired
TGRs are identical, the output value does not change when a compare match occurs.
In PWM mode 1, a maximum 8-phase PWM output is possible.
• PWM mode 2
PWM output is generated using one TGR as the cycle register and the others as duty registers. The output specified
in TIOR is performed by means of compare matches. Upon counter clearing by a cycle register compare match, the
output value of each pin is the initial value set in TIOR. If the set values of the cycle and duty registers are identical,
the output value does not change when a compare match occurs.
In PWM mode 2, a maximum 8-phase PWM output is possible in combination use with synchronous operation.
The correspondence between PWM output pins and registers is shown in Table 10.44.
Table 10.44 PWM Output Registers and Output Pins
Channel
0
1
2
3
4
Note: In PWM mode 2, PWM output is not possible for the TGR register in which the period is set.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Registers
TGRA_0
TGRB_0
TGRC_0
TGRD_0
TGRA_1
TGRB_1
TGRA_2
TGRB_2
TGRA_3
TGRB_3
TGRC_3
TGRD_3
TGRA_4
TGRB_4
TGRC_4
TGRD_4
10. Multi-Function Timer Pulse Unit 2
Output Pins
PWM Mode 1
TIOC0A
TIOC0C
TIOC1A
TIOC2A
TIOC3A
TIOC3C
TIOC4A
TIOC4C
PWM Mode 2
TIOC0A
TIOC0B
TIOC0C
TIOC0D
TIOC1A
TIOC1B
TIOC2A
TIOC2B
Cannot be set
Cannot be set
Cannot be set
Cannot be set
Cannot be set
Cannot be set
Cannot be set
Cannot be set
10-78