Setting Example 4 (Link Mode) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
⋅ Source:
⋅ Destination: 33330000H
⋅ Transfer size: 512 bytes
Figure 9.34 Setting Example 3
9.8.4

Setting Example 4 (Link Mode)

The following table shows a setting example applicable when DMA transfer is executed using the settings shown below.
Table 9.25 DMA Transfer Setting Example 4
Item
Channel used
Priority control
DMA mode
Transfer mode
Register set used
Descriptor start address
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
DCTRL ← 00000001H
N0SA_1 ← 11110000H
11110000H
N0DA_1 ← 33330000H
N0TB_1 ← 00000200H
N1SA_1 ← 22220000H
N1DA_1 ← 44440000H
N1TB_1 ← 00000800H
CHCFG_1 ← 61762001H
CHITVL_1 ← 00000000H
⋅ Interval: None
CHEXT_1 ← 00000000H
⋅ AXI setting: None
CHCTRL_1 ← 00000008H
Set 1 in the EN
CHCTRL_1 ← 00000005H
(DMA transfer enable)
and STG bits
Description
0
Round robin
Link
Block transfer
—
0000_1000H
Start
(setting example 3)
⋅ Round robin
⋅ Source:
⋅ Destination: 44440000H
⋅ Transfer size: 2048 bytes
⋅ Clear the status
Execute NEXT0
DMA transfer
Execute NEXT1
DMA transfer
DMAEND1 == 1
Check EN is set to "0"
Check CHSTAT_1
End
(setting example 3)
9. Direct Memory Access Controller
22220000H
9-71