Usage Note; Note On Bit Manipulation Instructions; Figure 2.13 State Transitions - Renesas H8S/2368 Series Hardware Manual

Bus-released state
Exception
handling state
Reset state*
Reset state
Notes: *1 From any state except hardware standby mode, a transition to the reset state occurs whenever
A transition can also be made to the reset state when the watchdog timer overflows.
*2 In every state, when the STBY pin becomes low, the hardware standby mode is entered.
*3 For details, refer to section 22, Power-Down Modes.
2.9

Usage Note

2.9.1

Note on Bit Manipulation Instructions

Bit manipulation instructions such as BSET, BCLR, BNOT, BST, and BIST read data in byte
units, perform bit manipulation, and write data in byte units. Thus, care must be taken when these
bit manipulation instructions are executed for a register or port including write-only bits.
In addition, the BCLR instruction can be used to clear the flag of an internal I/O register. In this
case, if the flag to be cleared has been set by an interrupt processing routine, the flag need not be
read before executing the BCLR instruction.
End of bus request
Bus request
Program execution state
External interrupt request
= High
1

Figure 2.13 State Transitions

= High,
= Low
Rev. 2.00, 05/03, page 55 of 820
Sleep mode
Software standby
mode
Hardware standby
2
mode*
3
Power down state*
goes low.