Register Descriptions; Receive Shift Register (Rsr); Receive Data Register (Rdr) - Renesas F-ZTAT H8 Series Hardware Manual

13.2

Register Descriptions

13.2.1

Receive Shift Register (RSR)

RSR is the register that receives serial data.
Bit 7
Read/Write —
The SCI loads serial data input at the RxD pin into RSR in the order received, LSB (bit 0) first,
thereby converting the data to parallel data. When 1 byte has been received, it is automatically
transferred to RDR. The CPU cannot read or write RSR directly.
13.2.2

Receive Data Register (RDR)

RDR is the register that stores received serial data.
Bit 7
Initial value 0
Read/Write R
When the SCI finishes receiving 1 byte of serial data, it transfers the received data from RSR into
RDR for storage. RSR is then ready to receive the next data. This double buffering allows data to
be received continuously.
RDR is a read-only register. Its contents cannot be modified by the CPU. RDR is initialized to
H'00 by a reset and in standby mode.
6 5 4
— — —
6 5 4
0 0 0
R R R
Section 13 Serial Communication Interface
3 2
— —
3 2
0 0
R R
Rev. 7.00 Sep 21, 2005 page 455 of 878
1 0
— —
1 0
0 0
R R
REJ09B0259-0700