Port 3 Open Drain Control Register (P3Odr) - Renesas H8S/2368 Series Hardware Manual

9.3.4

Port 3 Open Drain Control Register (P3ODR)

P3ODR controls the output status for each port 3 pin.
Bit Bit Name Initial Value
7 — 0
6 — 0
5 P35ODR 0
4 P34ODR 0
3 P33ODR 0
2 P32ODR 0
1 P31ODR 0
0 P30ODR 0
R/W Description
— Reserved
These bits are always read as 0 and cannot be
—
modified.
R/W Setting a P3ODR bit to 1 makes the corresponding
port 3 pin an NMOS open-drain output pin, while
R/W
clearing the bit to 0 makes the pin a CMOS output
R/W
pin.
R/W
R/W
R/W
Rev. 2.00, 05/03, page 325 of 820