Stack Status After Exception Handling - Renesas H8S/2100 Series Hardware Manual

16-bit single-chip microcomputer
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Section 4 Exception Handling
4.7

Stack Status after Exception Handling

Figure 4.2 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
Advanced mode
Normal mode
SP
CCR
CCR*
SP
CCR
PC
PC
(16 bits)
(24 bits)
Notes: * Ignored on return.
Normal mode is not available in this LSI.
Figure 4.2 Stack Status after Exception Handling
Rev. 1.00 Apr. 28, 2008 Page 83 of 994
REJ09B0452-0100

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