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S3C6400X RISC MICROPROCESSOR
TVENCREG28
Register
SyncSizeCTRL
0x7620006C
SyncSizeCTRL
SySize
TVENCREG29
Register
BurstCTRL
0x76200070
BurstCTRL
BuEnd
BuSt
TVENCREG30
Register
MacroBurstCTR
0x76200074
L
BurstCTRL
BumavSt
Address
R/W
R/W
Sync size control
Bit
[31:10]
Reserved
Hsync size
[9:0]
0x3D : NTSC
0x3E : PAL
Address
R/W
R/W
Burst signal control
Bit
[31:26]
Reserved
Burst end position
[25:16]
0x69 : NTSC
0x6A : PAL
[15:10]
Reserved
Burst start position
[9:0]
0x49 : NTSC
0x4A : PAL
Address
R/W
R/W
Macrovision burst signal control
Bit
[31:10]
Reserved
Macrovision burst start position
[9:0]
0x41 : NTSC
0x42 : PAL
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
Description
Description
TV ENCODER
Reset Value
0x0000003D
Reset Value
0
0x3D
Reset Value
0x00690049
Reset Value
0
0x69
0
0x49
Reset Value
0x00000041
Reset Value
0
0x41
17-29
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