GPIO
EINT12MASK
Reserved
[31:24]
[16+m]
EINT2[m]
m = 0 ~ 7
Reserved
EINT1[n]
n = 0 ~ 14
EINT34MASK
Reserved
[31:30]
[16+m]
EINT4[m]
m = 0 ~ 13
Reserved
EINT3[n]
n = 0 ~ 4
EINT56MASK
Reserved
[31:26]
[16+m]
EINT6[m]
m = 0 ~ 9
Reserved
EINT5[n]
n = 0 ~ 6
EINT78MASK
[16+m]
EINT8[m]
m = 0 ~ 14
EINT7[n]
n = 0 ~ 15
EINT9MASK
Reserved
EINT9[n]
n = 0 ~ 8
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
70
10-
Bit
Reserved
0 = Enable Interrupt
[15]
Reserved
[n]
0 = Enable Interrupt
Bit
Reserved
0 = Enable Interrupt
[15:5]
Reserved
[n]
0 = Enable Interrupt
Bit
Reserved
0 = Enable Interrupt
[15:7]
Reserved
[n]
0 = Enable Interrupt
Bit
0 = Enable Interrupt
[n]
0 = Enable Interrupt
Bit
[31:9]
Reserved
[n]
0 = Enable Interrupt
S3C6400 RISC MICROPROCESSOR
Description
1= Masked
1= Masked
Description
1= Masked
1= Masked
Description
1= Masked
1= Masked
Description
1= Masked
1= Masked
Description
1= Masked
Initial State
0
1
0
1
Initial State
0
1
0
1
Initial State
0
1
0
1
Initial State
1
1
Initial State
0
1