Samsung S3C6400X User Manual page 308

DMA
Next LLI address
Next LLI address + 0x04
Next LLI address + 0x08
Next LLI address + 0x0C
Next LLI address + 0x10
7. Write the control information into the DMACCxControl register.
8. Write the channel configuration information into the DMACCxConfiguration register. If the Enable bit is set then
the DMA channel is automatically enabled.
Preliminary product information describe products that are in development,
11-12
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Offset
Source Address for next transfer
Destination Address for next transfer
Next LLI address for next transfer
DMACCxControl0 data for next transfer
DMACCxControl1 data for next transfer
S3C6400 RISC MICROPROCESSOR
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