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HSMMC CONTROLLER
(4) Change the bit mode for a SD card. Change SD memory card bus width by ACMD6 and SDIO card bus width
by setting Bus Width of Bus Interface Control register in CCCR.
(5) In case of you want to change to 4-bit mode, set Data Transfer Width in the Host Control register to 1. In
another case (1-bit mode), set this bit to 0.
(6) In case of SD memory card, go to the 'End'. In case of other card, go to step (7).
(7) Set "IENM" of the CCCR in a SDIO or SD combo card to 1 by CMD52.
(8) Set Card Interrupt Status Enable in the Normal Interrupt Status Enable register to 1.
TIMEOUT SETTING FOR DAT LINE
In order to detect timeout errors on DAT line, the Host Driver will execute the following two steps before any SD
transaction.
(1) Calculate a divisor to detect timeout errors by reading Timeout Clock Frequency and Timeout Clock Unit in the
Capabilities register. If Timeout Clock Frequency is 00 0000b, the Host System shall provide this information to
the Host Driver by another method.
(2) Set Data Timeout Counter Value in the Timeout Control register in accordance with the value from step (1)
above.
SD TRANSACTION GENERATION
This section describes the sequence to generate and control various kinds of SD transactions. SD transactions
are classified into three cases:
(1) Transactions that do not use the DAT line.
(2) Transactions that use the DAT line only for the busy signal.
(3) Transactions that use the DAT line for transferring data.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-8
Specifications and information herein are subject to change without notice.
START
(1)
Calculate a Divisor for detecting Timeout
(2)
Set Timeout Detection Timer
END
Figure 27-8. Timeout Setting Sequence
S3C6400X RISC MICROPROCESSOR
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