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S3C6400X RISC MICROPROCESSOR
21
MULTI-FORMAT VIDEO CODEC
This chapter describes the function and usages of Multi-Format Video codec in S3C6400X RISC microprocessor.
Overview
FIMV-MFC V1.0 is a high-performance video codec IP that supports H.263P3, MPEG-4 SP, H.264 and VC-1.
FIMV-MFC V1.0 consists of the embedded BIT processor and video codec core module. The BIT processor
parses or forms bitstream and controls the video codec. To speed up the bitstream processing, some hardware
accelerators are included in the BIT processor. The program and data for the BIT processor are downloaded
through the AMBA APB bus and the AMBA AXI bus.
Figure 21.1. FIMV-MFC V1.0 block diagram
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MULTI-FORMAT VIDEO CODEC
21-1
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