Samsung S3C6400X User Manual page 922

HSMMC CONTROLLER
Block Gap Control register
Normal Interrupt Status register
'1' = Reset
'0' = Work
Software Reset For CMD Line
[1]
Only part of command circuit is reset. (RWAC)
The following registers and bits are cleared by this bit:
Present State register
Normal Interrupt Status register
'1' = Reset
'0' = Work
Software Reset For All
[0]
This reset affects the entire Host Controller except for the card detection
circuit. Register bits of type ROC, RW, RW1C, RWAC are cleared to 0.
During its initialization, the Host Driver sets this bit to 1 to reset the Host
Controller. The Host Controller reset this bit to 0 when capabilities registers are
valid and the Host Driver can read them. Additional use of Software Reset For
All may not affect the value of the Capabilities registers. If this bit is set to 1, the
SD card shall reset itself and must be reinitialized by the Host Driver. (RWAC)
'1' = Reset
'0' = Work
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-46
Specifications and information herein are subject to change without notice.
Buffer Write Enable
Read Transfer Active
Write Transfer Active
DAT Line Active
Command Inhibit (DAT)
Continue Request
Stop At Block Gap Request
Buffer Read Ready
Buffer Write Ready
DMA Interrupt
Block Gap Event
Transfer Complete
Command Inhibit (CMD)
Command Complete
S3C6400X RISC MICROPROCESSOR
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