Samsung S3C6400X User Manual page 348

S3C6400X RISC MICROPROCESSOR
FIFO-RX MESSAGE LENGTH COUNTER
Register Address
FRx_MLenCnt 0x7D40_0010 R/W FIFO-Rx Message Count Reg. (Number of words left)
FRx_MLenCnt Bit
FRx_MLenCnt [31:0]
FIFO-RX WRITE BUFFER
Register Address
FRx_WrBuf 0x7D40_0040
0x7D40_007C
0x7D90_0040
0x7D90_007C
FRx_WrBuf
FRx_WrBuf
* Note: Write access to
given. That is, any address between 0x0040 and 0x007C will trigger the FIFO memory write. This feature lets
the programmer use burst write to the FIFO-Rx.
R/W
Number of words left for transfer.
R/W
W FIFO-Rx write buffer (32-word)
Note: This address is for CPU access.
~
FIFO-Rx write buffer (32-word)
~ Note: This address is for SDMA1(Security DMA 1).
You should use it to transfer from memory to
FRx_WrBuf using SDMA1.
Bit
[31:0]
FIFO-Rx write buffer (32x32-bit)
makes FIFO-Rx to write data to the FIFO memory regardless of the address
FRx_WrBuf
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
SECURITY SUB-SYSTEM
Reset Value
0x0000_0000
Initial State
0x0000_0000
Reset Value
0x0000_0000
Initial State
0x0000_0000
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