Samsung S3C6400X User Manual page 904

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HSMMC CONTROLLER
[5]
Data Present Select
This bit is set to 1 to indicate that data is present and shall be transferred using
the DAT line. It is set to 0 for the following:
(1) Commands using only CMD line (ex. CMD52).
(2) Commands with no data transfer but using busy signal on DAT[0] line
(R1b or R5b ex. CMD38)
(3) Resume command
=
1
=
0
[4]
Command Index Check Enable
If this bit is set to 1, the Host Controller shall check the Index field in the
response to see if it has the same value as the command index. If it is not, it is
reported as a Command Index Error. If this bit is set to 0, the Index field is not
checked.
=
1
0
=
[3]
Command CRC Check Enable
If this bit is set to 1, the Host Controller shall check the CRC field in the
response. If an error is detected, it is reported as a Command CRC Error. If this
bit is set to 0, the CRC field is not checked. The number of bits checked by the
CRC field value changes according to the length of the response.
=
1
0
=
[2]
Reserved
[1:0]
Response Type Select
00 = No Response
01 = Response Length 136
10 = Response Length 48
11 = Response Length 48 check Busy after response
Response
Type
00
01
10
10
11
Relation Between Parameters and the Name of Response Type
These bits determine Response types.
Note: In the SDIO specification, response type notation of R5b is not defined. R5 includes R5b in the SDIO
specification. But R5b is defined in this specification to specify the Host Controller shall check busy after receiving
response. For example, usually CMD52 is used as R5 but I/O abort command shall be used as R5b.
Note: For CMD52 to read BS after writing "Bus Suspend," Command Type must be "Suspend" as well.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-28
Specifications and information herein are subject to change without notice.
Data Present
No Data Present
Enable
Disable
Enable
Disable
Index Check
CRC Check
Enable
0
0
0
1
1
Name of Response
Enable
0
No Response
1
0
R3, R4
1
R1, R6, R5
1
R1b, R5b
S3C6400X RISC MICROPROCESSOR
Type
R2

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