Samsung S3C6400X User Manual page 1021

UART
Register Address
UBRDIV0 0x7F005028
UBRDIV1 0x7F005428
UBRDIV2 0x7F005828
UBRDIV3 0x7F005C28
UBRDIV n
UBRDIV
Register Address
UDIVSLOT0 0x7F00502C
UDIVSLOT1 0x7F00542C
UDIVSLOT2 0x7F00582C
UDIVSLOT3 0x7F005C2C
UDIVSLOT n
UDIVSLOT
31-26
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
R/W
R/W Baud rate divisior register 0
R/W Baud rate divisior register 1
R/W Baud rate divisior register 2
R/W Baud rate divisior register 3
Bit
[15:0] Baud rate division value
UBRDIVn >0
R/W
R/W Baud rate divisior register 0
R/W Baud rate divisior register 1
R/W Baud rate divisior register 2
R/W Baud rate divisior register 3
Bit
[15:0] Select the slot where clock generator divide clock
source by (UBRDIV + 2)
S3C6400 RISC MICROPROCESSOR
Description
Description
Description
Description
Reset Value
0x0000
0x0000
0x0000
0x0000
Initial State
-
Reset Value
0x0000
0x0000
0x0000
0x0000
Initial State
-