Samsung S3C6400X User Manual page 167

NAND FLASH CONTROLLER
Data Register Configuration
1) 8-bit NAND Flash Memory Interface
A. Word Access
Register
NFDATA
B. Half-word Access
Register
NFDATA
C. Byte Access
Register
NFDATA
STEPPINGSTONE (4KB SRAM)
The NAND Flash controller uses Steppingstone as the buffer on booting and also you can use this area for
various other purpose.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
8-6
Specifications and information herein are subject to change without notice.
Endian Bit [31:24]
th
Little 4 I/O[ 7:0]
Endian Bit [31:24]
Little Invalid value
Endian Bit [31:24]
Little Invalid value
S3C6400X RISC MICROPROCESSOR
Bit [23:16] Bit [15:8]
rd nd
3 I/O[ 7:0] 2 I/O[ 7:0]
Bit [23:16] Bit [15:8]
nd
Invalid value 2 I/O[ 7:0]
Bit [23:16] Bit [15:8]
Invalid value Invalid value
Bit [7:0]
st
1 I/O[ 7:0]
Bit [7:0]
st
1 I/O[ 7:0]
Bit [7:0]
st
1 I/O[ 7:0]