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HOST INTERFACE
Register Descriptions (Protocol Registers)
Register
Bank
CTRL
0x0
INTE
STAT
CTRL1
0x1
INTE1
STAT1
IMBL
0x2
IMBH
OMBL
0x3
OMBH
hDATAL
0x8
hDATAH
SYS_CTRL
0xB
Reserved
Reserved
BSEL
all banks
Note : MP_A[1:0] are input pin names "XhiADDR[1:0]", MP means Modem Processor and MP_A means MP
Address".
24-14
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MP_A[1:0]
R/W
00
R/W
Control Register
01
R/W
Interrupt Enable Register
10
R
Status Register
00
R/W
Control1 Register
01
R/W
Interrupt Enable1 Register
10
R
Status1 Register
00
R/W
In-Mail Box Low Register
01
R/W
In-Mail Box High Register
00
R
Out-Mail Box Low Register
01
R
Out-Mail Box High Register
00
R/W
Host Interface Data Low Register
01
R/W
Host Interface Data High Register
System Control Register
00
R/W
Reserved
01
R/W
Reserved
10
R
11
R/W
Bank Selection Register
S3C6400X
RISC MICROPROCESSOR
Description
Reset Value
0x0000
0x2000
0x90A2
0x0000
0x0000
0x0002
0x0000
0x0000
0x0000
0x0000
-
-
0x0000
0x0005
???
0x0000
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