Samsung S3C6400X User Manual page 427

S3C6400X RISC MICROPROCESSOR
I80 / RGB Trigger Control Register
Register Address
TRIGCON 0x771001A
4
TRIGCON
reserved
SWFRSTATUS
SWTRGCMD
TRGMODE
LCD I80 Interface Control 0
Register Address
I80IFCONA0 0x771001B0
I80IFCONA1 0x771001B4
I80IFCONAx
-
LCD_CS_SETUP
LCD_WR _SETUP
010 = 19 bit ( A:6:6:6 )
011 = 18 bit ( A:6:6:5 )
100 = 18 bit ( 6:6:6 )
101 = 16 bit ( A:5:5:5 )
110 = 16 bit ( 5:6:5 )
R/W
R/W I80 / RGB Trigger Control Register
Bit
Must be '0'
[7:3]
[2] Frame Done Status [Read Only]
0 : Indicate I80 frame transfer is not finished
1 : Indicate I80 frame transfer finished
* Clear Condition: Read or New Frame Start
* Only when TRGMODE is '1'
[1] 1 : Software Triggering Command [Write Only]
* Only when TRGMODE is '1'
Software Trigger enable control
[0]
0 : Disable
1 : Enable
R/W
R/W I80 Interface control for Main LDI(LCD)
R/W I80 Interface control for Sub LDI(LCD)
Bit
[22:20] Reserved
[19:16] Numbers of clock cycles for the active period of the address
signal enable to the chip select enable.
[15:12] Numbers of clock cycles for the active period of the CS
signal enable to the write signal enable.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
DISPLAY CONTROLLER
Reset Value
0x0
Initial State
0
0
0
0
Reset Value
0x0
0x0
Initial State
0
0
0
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