Samsung S3C6400X User Manual page 37

PRODUCT OVERVIEW
1.1.18.8 System Management
•
Reset
Signal I/O
XnRESET I
XnWRESET I
XsRSTOUTn O
•
Clock
Signal I/O
XrtcXTI I
XrtcXTO O
X27mXTI I
X27mXTO O
XXTI I
XXTO O
XEXTCLK I
•
JTAG
Signal I/O
XjTRSTn I
XjTMS I
XjTCK I
XjRTCK O
XjTDI I
XjTDO O
XjDBGSEL I
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
1-34
XnRESET suspends any operation in progress and places S3C6400 into a known
reset state. For a reset, XnRESET must be held to L level for at least 4 FCLK after
the processor power has been stabilized.
System Warm Reset. Reset the whole system while preserves the SDRAM
contents
For external device reset control (sRSTOUTn = nRESET & nWDTRST &
SW_RESET)
32 KHz crystal input for RTC.
32 KHz crystal output for RTC.
27MHz Crytal Input for display modules
27MHz Crystal output for display modules
Crystal Input for internal osc circuit.
Crystal output for internal osc circuit.
External clock source.
XjTRSTn (TAP Controller Reset) resets the TAP controller at start.
If debugger is used, A 10K pull-up resistor has to be connected.
If debugger(black ICE) is not used, XjTRSTn pin must be at L or low active pulse.
Note. Whenever Reset operates, XjTRSTn pin must be low active pulse
XjTMS (TAP Controller Mode Select) controls the sequence of the TAP controller's
states. A 10K pull-up resistor has to be connected to TMS pin.
XjTCK (TAP Controller Clock) provides the clock input for the JTAG logic.
. A 10K pull-dn resistor has to be connected to TMS pin
XjRTCK (TAP Controller Returned Clock) provides the clock output for the JTAG
logic.
XjTDI (TAP Controller Data Input) is the serial input for test instructions and data.
A 10K pull-up resistor must be connected to TDI pin.
XjTDO (TAP Controller Data Output) is the serial output for test instructions and
data. It is possible to control pull-down by GPIO register. Refer GPIO manual.
JTAG selection. 1: Peripherals JTAG, 0: ARM1176JZF-S Core JTAG
S3C6400 RISC MICROPROCESSOR
Description
Description
Description