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S3C6400X RISC MICROPROCESSOR
24
Overview
The Host Interface block in the S3C6400X supports indirect access of the external host device (Ex: Modem
Chip).
By the selected host interface protocol, the following operations are supported:
Read of a 16-bit protocol register
Write of a 16-bit protocol register
Single Write on the SFR/memory in the system memory map
Single Read from the SFR/memory in the system memory map
Burst Write on the SFR/memory in the system memory map
Burst Read from the SFR/memory in the system memory map
Repeated Burst Write on the SFR/memory in the system memory map
Figure 24-1 32-bit Protocol Register Access by Using Two 16-bit Read/Write
HOST INTERFACE
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
HOST INTERFACE
24-1
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