Samsung S3C6400X User Manual page 271

GPIO
MEM0_nWEdmc
MEM0_AP
MEM0_D
MEM0CONSLP1
Reserved [31:26]
MEM0_nOEata [25:24]
MEM0_nWEata [23:22]
MEM0_SMCLK [21:20]
MEM0_WAIT [19:18]
MEM0_REGata [17:16]
MEM0_RESETata [15:14]
MEM0_RP_RnB [13:12]
MEM0_ADDRVLD [11:10]
MEM0_INTsm1_F
REn
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
50
10-
[7:6] Memory port 0 Dram Write Enable pin (Xm0nWEdmc)
Configure
00 = output 0,
1x = output disable ( hi-Z )
[5:4] Memory port 0 AP pin (Xm0AP) Configure
00 = output 0,
1x = output disable ( hi-Z )
[3:0] Memory Port 0 Data pin(Xm0DATA) Configure
0000 = output 0
0001 = output 1
0100 = input ( hi-Z )
0101 = input pull-down enable
0110 = inupt pull-up enable
0111 = do not use
10xx = Previous state
Bit
Reserved
ATA I/F Output Enable pin(Xm0nOEata) Configure
00 = output 0,
1x = input (pull-up)
ATA I/F Write enable pin(Xm0nWEata) Configure
00 = output 0,
1x = input (pull-up)
ROM bank Clock pin(Xm0SMCLK) Configure
00 = output 0,
1x = input (pull-up)
ROM bank Wait pin(XrWAITn) Configure
00 = output 0,
1x = input (pull-up)
Nand Flash RnB pin (XfREGata) Configure
00 = output 0,
1x = input (Hi-Z)
Memory port 0 RESET pin (Xm0RESETata) Configure
00 = output 0,
1x = output disable ( hi-Z )
Memory port 0 RP pin (Xm0RP) Configure
00 = output 0,
1x = output disable ( hi-Z )
Memory port 0 ADDRVLD pin (Xm0ADDRVLD) Configure
00 = output 0,
1x = output disable ( hi-Z )
[9:8] Memor port 0 FREn pin(Xm0INTsm1_FREn) Configure
00 = output 0,
1x = output disable ( hi-Z )
S3C6400 RISC MICROPROCESSOR
01 = output 1
01 = output 1
Description
01 = output 1
01 = output 1
01 = output 1
01 = output 1
01 = output 1
01 = output 1
01 = output 1
01 = output 1
01 = output 1
00
00
0000
Initial State
0
0
0
0
0
0
0
0
0
0