Samsung S3C6400X User Manual page 974

S3C6400X RISC MICROPROCESSOR
SPECIAL FUNCTION REGISTER DESCRIPTIONS
SETTING SEQUENCE OF SPECIAL FUNCTION REGISTER
Special Function Register must be set in the following sequence. (nCS manual mode)
1. Set Transfer Type. ( CPOL & CPHA set )
2. Set Clock configuration register.
3. Set SPI MODE configuration register.
4. Set SPI INT_EN register.
5. Set Packet Count configuration register if necessary.
6. Set Tx or Rx Channel on.
7. Set nSSout low to start Tx or Rx operation.
A. Set nSSout Bit to low, then start TX data writing.
B. If auto chip selection bit is set, should not control nCS.
SPECIAL FUNCTION REGISTER
Register
CH_CFG(Ch0)
CH_CFG(Ch1)
CH_CFG Bit
SW_RST [5]
SLAVE [4]
CPOL [3]
CPHA [2]
RxChOn [1]
Address R/W
0x7F00B000 R/W SPI configuration register
0x7F00C000 R/W SPI configuration register
R/W Software reset
0: inactive
R/W Whether SPI Channel is Master or Slave
0: Master
R/W Determine an active high or active low clock
0: active high
R/W Select one of the two fundamentally different
transfer format
0: format A
R/W SPI Rx Channel On
0: Channel Off
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
1: active
1: Slave
1: active low
1: format B
1: Channel On
SPI CONTROLLER
Reset Value
0x0
0x0
Initial State
1'b0
1'b0
1'b0
1'b0
1'b0
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