Samsung S3C6400X User Manual page 587

CAMERA INTERFACE
CODEC OUTPUT CB1 START ADDRESS REGISTER
Register Address
CICOCBSA1 0x78000028
CICOCBSA1
CICOCBSA1 [31:0]
CODEC OUTPUT CB2 START ADDRESS REGISTER
Register Address
CICOCBSA2 0x7800002C
CICOCBSA2
CICOCBSA2 [31:0]
CODEC OUTPUT CB3 START ADDRESS REGISTER
Register Address
CICOCBSA3 0x78000030
CICOCBSA3
CICOCBSA3 [31:0]
CODEC OUTPUT CB4 START ADDRESS REGISTER
Register Address
CICOCBSA4 0x78000034
CICOCBSA4
CICOCBSA4 [31:0]
Preliminary product information describe products that are in development,
20-22
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
R/W
RW
Bit
Cb 1
R/W
RW
Bit
nd
Cb 2 frame start address for codec DMA
R/W
RW
Bit
rd
Cb 3 frame start address for codec DMA
R/W
RW
Bit
th
Cb 4 frame start address for codec DMA
Description
st
Cb 1 frame start address for codec DMA
Description
st
frame start address for codec DMA
Description
nd
Cb 2 frame start address for codec DMA
Description
Description
rd
Cb 3 frame start address for codec DMA
Description
Description
th
Cb 4 frame start address for codec DMA
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
Initial
State
Reset Value
Initial
State
Reset Value
Initial
State
Reset Value
Initial
State
0
M L
0
O X
0
M L
0
O X
0
M L
0
O X
0
M L
0
O X