Samsung S3C6400X User Manual page 677

FIMV-MFC V1.0
The host interface registers
BIT Processor's registers are divided into 2 categories.
Address 0x000 ~ 0x0FC (64 registers address space) are H/W registers. These registers have reset values
and the functions are fixed (not configurable).
Address 0x100 ~ 0x1FC (64 registers) are general purpose S/W registers. They have no reset values and are
configurable by BIT firmware. They are used as interface between host and BIT processor.
Upper 32 registers (address 0x100 ~ 0x17C) are used as static parameters. The meanings or functions of
those registers are not changed for all kinds of run commands (SEQ_INIT, SEQ_END, PICTURE_RUN) and
applied to all commands. Lower 32 registers (address 0x180 ~ 0x1FC) are used as temporal command
arguments. The meanings or functions of those registers may be changed for each run commands.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MULTI-FORMAT
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