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ONENAND CONTROLLER
INTERRUPT ERROR ACKNOWLEDGE REGISTER
Register
INT_ERR_ACK0
INT_ERR_ACK1
INT_ERR_ACKn
Reserved
CACHE_OP_ERR
RST_CMP
RDY_ACT
INT_ACT
UNSUP_CMD
LOCKED_BLK
BLK_RW_CMP
ERS_CMP
PGM_CMP
LOAD_CMP
ERS_FAIL
PGM_FAIL
INT_TO
LD_FAIL_ECC_ERR
ECC ERROR STATUS REGISTER
Register
ECC_ERR_STAT0
ECC_ERR_STAT1
ECC_ERR_STATn
Reserved
ECC_ERR_STAT
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
7-22
Specifications and information herein are subject to change without notice.
Address
R/W
0x70100050
W
Bank0 Interrupt Error Acknowledge Register
0x70180050
Bit
[31:14]
[13]
Acknowledge bits that correspond to the bits in the
INT_ERR_STAT register. Setting this bit resets or
[12]
acknowledges the associated interrupt. Set by software.
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Address
R/W
0x70100060
R/W Bank0 ECC Error Status Register
0x70180060
Bit
[31:16]
[15:0]
The value programmed will depend on the actual memory
device being used. This data is used to report ecc error
information.
S3C6400X RISC MICROPROCESSOR
Description
Description
Description
Description
Reset Value
0x0000
Initial State
0
0
Reset Value
0x0000
Initial State
0
0
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