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GPIO
MEM1CONSTOP
Reserved
[31:21]
MEM1_SCLKn
MEM1_SCLK
MEM1_CKE
MEM1_DQM
MEM1_A
MEM1_CASn
MEM1_RASn
MEM1_WEn
MEM1_CSn
Reserved
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
48
10-
Bit
reserved
[20]
Memory port 1 SCLKn pin (Xm1SCLKn) Configure
0 = Previous state
[19]
Memory port 1 SCLK pin (Xm1SCLK) Configure
0 = Previous state
[18]
Memory port 1 CKE pin (Xm1CKE) Configure
0 = Previous state
[17]
Memory port 1 DQM pin (Xm1DQM) Configure
0 = Previous state
[16]
Memory port 1 Address pin (Xm1ADDR) Configure
0 = Previous state
[15]
Memory port 1 CAS pin (Xm1CASn) Configure
0 = Previous state
[14]
Memory port 1 RAS pin (Xm1RASn) Configure
0 = Previous state
[13]
Memory port 1 Write Enable pin (Xm1WEn) Configure
0 = Previous state
[12]
Memory port 1 Chip Select pin (Xm1CSn) Configure
0 = Previous state
[11:0]
Reserved
Description
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
1 = Hi-Z
S3C6400 RISC MICROPROCESSOR
Initial State
0x0000
0
0
0
0
0
0
0
0
0
00
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