Table of Contents
Advertisement
S3C6400X RISC MICROPROCESSOR
- MSDMA OFFSET
Offset_Y/Cb/Cr/RGB
= Memory size for offset per a horizontal line
= Number of pixel (or sample) in horizontal offset × ByteSize_Per_Pixel (or Sample)
Cf.) ByteSize_Per_Pixel =
Real_Height =
MSDMA FOR CODEC CONTROL REGISTER
Register
Address
MSCOCTRL
0x780000FC
MSCOCTRL
Reserved
EOF_M_C
Order422_M_C
SEL_DMA_CAM_C
1 for YCbCr420 / YCbCr422 (non-interleave)
2 for YCbCr422 (interleave) / RGB 16-bit
4 for RGB 18/24-bit
SRC_Height / 2 : YCbCr 420 case
SRC_Height
: YCbCr 422 (non-interleave) case
R/W
RW
Bit
[31:7]
When MSDMA operation done, End Of Frame will be generated.
[6]
(read only this signal)
When source MSDMA image is interleaved YCbCr 4:2:2,
Interleaved YCbCr 4:2:2 input order style.
[4:3]
LSB
00
Y
Cb
[5:4]
0
01
Y
Cr
0
10
Cb
0
11
Cr
Y
0
Codec path input data selection.
[3]
0 : External camera input path
1 : Memory data input path (MSDMA)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
MSDMA for codec control register
Description
MSB
Y
Cr
0
1
0
Y
Cb
0
1
0
Y
Cr
Y
0
0
1
Cb
Y
0
0
1
CAMERA INTERFACE
Reset Value
0000_0000
Initial
M L
State
0
X X
0
O X
0
O X
0
O X
20-51
Advertisement
Table of Contents
