Samsung S3C6400X User Manual page 399

S3C6400X RISC MICROPROCESSOR
- [28]
VIDOUT [27:26] It determines the output format of Video Controller
L1_DATA16 [25:23] Select the mode of output data format of I80 CPU I/F (LDI1.)
L0_DATA16 [22:20] Select the mode of output data format of I80 CPU I/F (LDI0.)
- [19]
PNRMODE [18:17] Select the display mode. (Where, VIDOUT[1:0] == 2'b00)
CLKVALUP [16]
- [15:14] Reserved
CLKVAL_F [13:6]
Reserved (Must be zero)
00: RGB I/F
01: TV Encoder Interface
10: I80 CPU I/F for LDI0
11: I80 CPU I/F for LDI1
(Only when, VIDOUT[1:0] == 2'b11)
000 = 16 bit mode (16 BPP)
001 = 16 + 2 bit mode (18 BPP)
010 = 9 + 9 bit mode (18 BPP)
011 = 16 + 8 bit mode (24 BPP)
100 = 18 bit mode (18BPP)
101 = 8 + 8 bit mode (16BPP)
(Only when, VIDOUT[1:0] == 2'b10)
000 = 16 bit mode (16 BPP)
001 = 16 + 2 bit mode (18 BPP)
010 = 9 + 9 bit mode (18 BPP)
011 = 16 + 8 bit mode (24 BPP)
100 = 18 bit mode (18BPP)
101 = 8 + 8 bit mode (16BPP)
Reserved
00 = RGB Parallel format (RGB)
01 = RGB Parallel format (BGR)
10 = Serial Format (R->G->B)
11 = Serial Format (B->G->R)
Select the display mode. (Where, VIDOUT[1:0] == 2'b1x)
00 = RGB Parallel format (RGB)
Select CLKVAL_F update timing control
0 = always
1 = start of a frame (only once per frame)
Determine the rates of VCLK and CLKVAL[7:0]
VCLK = Video Clock Source / (CLKVAL+1) where CLKVAL >= 1
Note. 1. The maximum frequency of VCLK is 66MHz.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DISPLAY CONTROLLER
0
00
000
000
0
00
0
0
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