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S3C6400X RISC MICROPROCESSOR
CFG_BATF_WKUP
RESERVED
OSC27_EN
EINT_MASK
RESERVED
EINT_WAKEUP_MASK
NORMAL_CFG
RESERVED
IROM
RESERVED
DOMAIN_ETM
DOMAIN_S
DOMAIN_F
DOMAIN_P
DOMAIN_I
RESERVED
DOMAIN_V
RESERVED
STOP_CFG
RESERVED
MEMORY_ARM
ETM_MEMORY
RESERVED
TOP_MEMORY
RESERVED
ARM_LOGIC
BATF_WAKEUP_MASK field has 1)
11 : enter SLEEP mode or E-SLEEP mode
Configure wakeup source after XnBATF is cleared
[2]
0: use nWRESET only
1: use all SLEEP wakeup source
[1]
DO NOT CHANGE
Control 27MHz X-tal oscillator pad
[0]
(0: disable, 1: enable)
BIT
[31:28] RESERVED
External interrupt wake-up mask EINT[27:0] (0: use as
a wakeup source, 1: disable) This field affects on
[27:0]
NORMAL mode. Thus, this field must clear when EINT
is used as a normal external interrupt source.
BIT
[31]
DO NOT CHANGE
[30]
0: LP mode(OFF), 1: active mode(ON)
[29:17] DO NOT CHANGE
[16]
0: LP mode(OFF), 1: active mode(ON)
[15]
0: LP mode(OFF), 1: active mode(ON)
[14]
0: LP mode(OFF), 1: active mode(ON)
[13]
0: LP mode(OFF), 1: active mode(ON)
[12]
0: LP mode(OFF), 1: active mode(ON)
[11:10] DO NOT CHANGE
[9]
0: LP mode(OFF), 1: active mode(ON)
[8:0]
DO NOT CHANGE
BIT
[31:30] DO NOT CHANGE
[29]
0: LP mode(OFF), 1: active mode(ON)
When S3C6400 uses STOP mode, this field should be
[28]
'1'.
[27:21] DO NOT CHANGE
[20]
0: LP mode(OFF), 1: active mode(Retention)
[19:18] DO NOT CHANGE
[17]
0: LP mode(OFF), 1: active mode(ON)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DESCRIPTION
DESCRIPTION
DESCRIPTION
SYSTEM CONTROLLER
0
0
1
RESET VALUE
0x0
0x00_0000
RESET VALUE
1
1
0x1FFF
1
1
1
1
1
0x3
1
0x100
RESET VALUE
0
1
1
0x00
1
0x0
1
3-45
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