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S3C6400X RISC MICROPROCESSOR
HCLK_POST0
HCLK_ROT
HCLK_LCD
HCLK_TZIC
HCLK_INTC
HCLK_MFC
PCLK_GATE controls PCLK of all IPs.
PCLK_GATE
RESERVED
[31:25] RESERVED
PCLK_SKEY
PCLK_CHIPID
PCLK_SPI1
PCLK_SPI0
PCLK_HSIRX
PCLK_HSITX
PCLK_GPIO
PCLK_IIC
PCLK_IIS1
PCLK_IIS0
PCLK_AC97
PCLK_TZPC
PCLK_TSADC
PCLK_KEYPAD
PCLK_IRDA
PCLK_PCM1
PCLK_PCM0
PCLK_PWM
PCLK_RTC
PCLK_WDT
PCLK_UART3
PCLK_UART2
PCLK_UART1
PCLK_UART0
PCLK_MFC
SCLK_GATE controls special clocks of IPs.
[5]
Gating HCLK for POST0 (0: mask, 1: pass)
[4]
Gating HCLK for rotator (0: mask, 1: pass)
[3]
Gating HCLK for LCD controller (0: mask, 1: pass)
[2]
Gating HCLK for trust interrupt controller (0: mask, 1: pass)
Gating HCLK for vectored interrupt controller (0: mask, 1:
[1]
pass)
[0]
Gating HCLK for MFC (0: mask, 1: pass)
BIT
[24]
Gating PCLK for security key (0: mask, 1: pass)
[23]
Gating PCLK for chip ID (0: mask, 1: pass)
[22]
Gating PCLK for SPI1 (0: mask, 1: pass)
[21]
Gating PCLK for SPI0 (0: mask, 1: pass)
[20]
Gating PCLK for HSI receiver (0: mask, 1: pass)
[19]
Gating PCLK for HSI transmitter (0: mask, 1: pass)
[18]
Gating PCLK for GPIO (0: mask, 1: pass)
[17]
Gating PCLK for IIC (0: mask, 1: pass)
[16]
Gating PCLK for IIS1 (0: mask, 1: pass)
[15]
Gating PCLK for IIS0 (0: mask, 1: pass)
[14]
Gating PCLK for AC97 (0: mask, 1: pass)
[13]
Gating PCLK for TZPC (0: mask, 1: pass)
[12]
Gating PCLK for touch screen ADC (0: mask, 1: pass)
[11]
Gating PCLK for Key PAD (0: mask, 1: pass)
[10]
Gating PCLK for IRDA (0: mask, 1: pass)
[9]
Gating PCLK for PCM1 (0: mask, 1: pass)
[8]
Gating PCLK for PCM0 (0: mask, 1: pass)
[7]
Gating PCLK for PWM (0: mask, 1: pass)
[6]
Gating PCLK for RTC (0: mask, 1: pass)
[5]
Gating PCLK for watch dog timer (0: mask, 1: pass)
[4]
Gating PCLK for UART3 (0: mask, 1: pass)
[3]
Gating PCLK for UART2 (0: mask, 1: pass)
[2]
Gating PCLK for UART1 (0: mask, 1: pass)
[1]
Gating PCLK for UART0 (0: mask, 1: pass)
[0]
Gating PCLK for MFC (0: mask, 1: pass)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DESCRIPTION
SYSTEM CONTROLLER
1
1
1
1
1
1
RESET VALUE
0x7F
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3-31
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