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S3C6400X RISC MICROPROCESSOR

ATA_UDMA_TIME

Register
ATA_UDMA_TIME
0x70301930
ATA_UDMA_TIME
Reserved
UDMA_TDVH
UDMA_TDVS
UDMA_TRP
UDMA_TSS
UDMA_TACKENV
Address
Bits
[31:28]
Reserved bits
[27:24]
UDMA timing parameter tDVH
tDVH = HCLK time * (UDMA_TDVH + 1)
[23:16]
UDMA timing parameter tDVS
It shall not have zero value.
tDVS = HCLK time * (UDMA_TDVS + 1)
[15:8]
UDMA timing parameter tRP
tRP = HCLK time * (UDMA_TRP + 1)
[7:4]
UDMA timing parameter, tSS
tSS = HCLK time * (UDMA_TSS + 1)
[3:0]
UDMA timing parameter tENV(envelope time)
(from DMACKn to STOP and HDMARDYn),
tACK(setup and hold time for DMACKn)
tENV = HCLK time * (UDMA_TACKENV + 1)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
ATA UDMA timing
Description
CF CONTROLLER
Reset Value
0x020b_1362
R/W
Reset
Value
R
0x0
R/W
0x2
R/W
0x0B
R/W
0x13
R/W
0x6
R/W
0x2
9-27

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