Samsung S3C6400X User Manual page 820

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S3C6400X RISC MICROPROCESSOR
DIEPINT15
0xAE8
DIEPTSIZ15
0xAF0
DIEPDMA15
0xAF4
Device Logical OUT Endpoint-Specific Registers
DOEPCTL0
0xB00
DOEPINT0
0xB08
DOEPTSIZ0
0xB10
DOEPDMA0
0xB14
DOEPCTL1
0xB20
DOEPINT1
0xB28
DOEPTSIZ1
0xB30
DOEPDMA1
0xB34
DOEPCTL2
0xB40
DOEPINT2
0xB48
DOEPTSIZ2
0xB50
DOEPDMA2
0xB54
DOEPCTL3
0xB60
DOEPINT3
0xB68
DOEPTSIZ3
0xB70
DOEPDMA3
0xB74
DOEPCTL4
0xB80
DOEPINT4
0xB88
DOEPTSIZ4
0xB90
DOEPDMA4
0xB94
DOEPCTL5
0xBA0
DOEPINT5
0xBA8
DOEPTSIZ5
0xBB0
DOEPDMA5
0xBB4
DOEPCTL6
0xBC0
DOEPINT6
0xBC8
DOEPTSIZ6
0xBD0
DOEPDMA6
0xBD4
DOEPCTL7
0xBE0
DOEPINT7
0xBE8
DOEPTSIZ7
0xBF0
DOEPDMA7
0xBF4
DOEPCTL8
0xC00
DOEPINT8
0xC08
R/W
Device IN Endpoint 15 Interrupt Register
R/W
Device IN Endpoint 15 Transfer Size Register
R/W
Device IN Endpoint 15 DMA Address Register
R/W
Device Control OUT Endpoint 0 Control Register
R/W
Device OUT Endpoint 0 Interrupt Register
R/W
Device OUT Endpoint 0 Transfer Size Register
R/W
Device OUT Endpoint 0 DMA Address Register
R/W
Device Control OUT Endpoint 1 Control Register
R/W
Device OUT Endpoint 1 Interrupt Register
R/W
Device OUT Endpoint 1 Transfer Size Register
R/W
Device OUT Endpoint 1 DMA Address Register
R/W
Device Control OUT Endpoint 2 Control Register
R/W
Device OUT Endpoint 2 Interrupt Register
R/W
Device OUT Endpoint 2 Transfer Size Register
R/W
Device OUT Endpoint 2 DMA Address Register
R/W
Device Control OUT Endpoint 3 Control Register
R/W
Device OUT Endpoint 3 Interrupt Register
R/W
Device OUT Endpoint 3 Transfer Size Register
R/W
Device OUT Endpoint 3 DMA Address Register
R/W
Device Control OUT Endpoint 4 Control Register
R/W
Device OUT Endpoint 4 Interrupt Register
R/W
Device OUT Endpoint 4 Transfer Size Register
R/W
Device OUT Endpoint 4 DMA Address Register
R/W
Device Control OUT Endpoint 5 Control Register
R/W
Device OUT Endpoint 5 Interrupt Register
R/W
Device OUT Endpoint 5 Transfer Size Register
R/W
Device OUT Endpoint 5 DMA Address Register
R/W
Device Control OUT Endpoint 6 Control Register
R/W
Device OUT Endpoint 6 Interrupt Register
R/W
Device OUT Endpoint 6 Transfer Size Register
R/W
Device OUT Endpoint 6 DMA Address Register
R/W
Device Control OUT Endpoint 7 Control Register
R/W
Device OUT Endpoint 7 Interrupt Register
R/W
Device OUT Endpoint 7 Transfer Size Register
R/W
Device OUT Endpoint 7 DMA Address Register
R/W
Device Control OUT Endpoint 8 Control Register
R/W
Device OUT Endpoint 8 Interrupt Register
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
USB2.0 HS OTG
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_8000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
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