Samsung S3C6400X User Manual page 940

HSMMC CONTROLLER
CONTROL REGISTER 2
This register contains the SD Command Argument.
Register
CONTROL2_0 0x7C200080
CONTROL2_1 0x7C300080
CONTROL2_2 0x7C400080
Name Bit
Reserved [31]
CmdCnfmask [30]
CDInvRXD [29]
SelCardOut [28]
FltClkSel [27:24] Filter Clock (iFLTCLK) Selection
LvlDAT [23:16] DAT line level
EnFBCLKT [15]
EnFBCLKR [14]
SDCDSel [13]
CardSync [12]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-64
Specifications and information herein are subject to change without notice.
Address R/W
R/W
R/W
R/W
Reserved
Command Conflict Mask Enable
This bit can mask enable the Command Conflict Status (bit [1:0] of the
"ERROR INTERRUPT STATUS REGISTER")
0=Mask Disable, 1=Mask Enable
Card Detect signal inversion for RX_DAT[3]
0=Disable, 1=Enable
Card Removed Condition Selection
0= Card Removed condition is "Not Card Insert" State (When the transition
from "Card Inserted" state to "Debouncing" state in Figure 27-2)
1= Card Removed state is "Card Out" State (When the transition from
"Debouncing state to "No Card" state in Figure 27-2)
Filter Clock period = 2^(FltClkSel + 5) x iSDCLK period
0000 = 25 x iSDCLK, 0001 = 26 x iSDCLK ... 1111 = 220 x iSDCLK
Bit[23]=DAT[7], BIT[22]=DAT[6], BIT[21]=DAT[5], BIT[20]=DAT[4],
Bit[19]=DAT[3], BIT[18]=DAT[2], BIT[17]=DAT[1], BIT[16]=DAT[0]
(Read Only)
Feedback Clock Enable for Tx Data/Command Clock
'0'=Disable, '1'=Enable
Feedback Clock Enable for Rx Data/Command Clock
'0'=Disable, '1'=Enable
SD Card Detect Signal Selection
Card Detect Pin Level does not simply reflect SDCD# pin, but chooses from
SDCD, DAT[3], or CDTestlvl depending on CDSigSel and this field
(SDCDSel) values
'0'=nSDCD is used for SD Card Detect Signal
'1'=DAT[3] is used for SD Card Detect Signal
SD Card Detect Sync Support
This field is used to enable output CMD and DAT referencing SD Bus
Description
Control register 2 (Channel 0)
Control register 2 (Channel 1)
Control register 2 (Channel 2)
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
0x0
0x0
0x0
Initial
Value
0
0
0
0
0
Line
state
0
0
0
0