S3C6400X RISC MICROPROCESSOR
XhiDATA[15]
Xm0CData
Xm0INTata
Xm0WAITn
Xm0INPACKata
Xm0INPACKata
B
(XhiIRQn)
Xm0CData
I
Xm0INTata
I
XhiADR[12]
I
XhiOEnI
I
Table 9-1: I/O signal description
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Card detect signals
Interrupt request from CF card.
PC card mode : active low (memory mode : level triggering,
I/O mode : edge triggering)
True-IDE mode : active high
Wait signal from CF card
UDMA mode : device strobe
Input acknowledge in I/O mode
PC card mode : not used
True-IDE mode : DMA request
CF CONTROLLER
9-5