Samsung S3C6400X User Manual page 148

ONENAND CONTROLLER
Individual Register Descriptions
MEMORY DEVICE CONFIGURATION REGISTER
The value programmed will depend on the actual memory device being used. This value is related with system
configuration register 1(0xF221) of OneNAND Flash. This data is used to configure the flash for the hardware and
software environment and may include burst length, read latency, transfer mode, ECC configuration, polarity
levels, etc. This register is set by software during initialization, and when there is no OneNAND memory access.
The below field description is for kfm1g16q2a. Please refer to appropriate model manual.
Register
MEM_CFG0
MEM_CFG1
MEM_CFGn
Reserved
RM
BURST_RD_LAT
BURST_LENGTH
ECC
RDYPOL
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
7-18
Specifications and information herein are subject to change without notice.
Address R/W
0x70100000 R/W Bank0 Memory Device Configuration Register
0x70180000
Bit
[31:16]
[15] Sets the transfer mode for read operations as synchronous or
asynchronous. Default value is 0x0. Set by software during
initialization.
• 0 = Asynchronous Mode.
• 1 = Activate Synchronous Mode.
[14:12] Sets the burst read latency in cycles.
• 000~010 = Reserved
• 011 = 3 (up to 40MHz)
• 100 = 4
• 101 = 5
• 110 = 6
• 111 = 7
[11:9] Sets the burst length.
• 000 = Continuous
• 001 = 4 halfwords
• 010 = 8 halfwords
• 011 = 16 halfwords (Recommended)
• 100 = 32 halfwords
• 101 = 1K halfwords (Block Read Only)
• 110~111 = Reserved
[8] Error Correction Operation.
• 0 = With correction.
• 1 = without correction (by-passed).
[7] RDY signal polarity.
• 0 = Low for ready.
S3C6400X RISC MICROPROCESSOR
Description
Description
Reset Value
0x00000000
Initial State
0
100
0
0
0