Samsung S3C6400X User Manual page 631

FIMV-MFC V1.0
The Bit Processor
This section describes the BIT processor that is optimized to process bitstream in various formats such as
MPEG-4, H.263, H.264 and VC-1.
The BIT processor is an embedded programmable 16-bit DSP that is highly optimized to handle bitstream data.
In addition to processing bitstream, the BIT processor controls the video codec and communicates with a host
processor through the host interface. The BIT processor has program memory of 12KB and data memory of 4KB.
Figure 21.3 displays the block diagram of the BIT processor. The special registers include command, interrupt,
and code download registers. The general purpose registers, 64 32-bit registers, can be used for the host
processor to send parameters to the video codec. If an application needs more than 64 registers, an external
memory can be used for extension because the BIT processor can access the external memory through the AXI
bus interface.
Special registers
Host interface
General purpose
registers
Internal Peri. I/F
AXI bus
External Mem. I/F
Figure 21.3. BIT processor block diagram
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MULTI-FORMAT
VIDEO
BIT Processor Core
Program
Data
Mem
Mem
2048x16b
2048x16b
4096x16b
CODEC
21-5